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A Novel Architecture of Vision Chip for Fast Traffic Lane Detection and FPGA Implementation 会议论文
2009 IEEE 8TH INTERNATIONAL CONFERENCE ON ASIC, Changsha, PEOPLES R CHINA, 2009
作者:  Li YJ (Li Yuan-Jin);  Zhang WC (Zhang WanCheng);  Wu NJ (Wu Nan-Jian);  Li, YJ, Chinese Acad Sci, Inst Semicond, State Key Lab Superlattices & Microstruct, Beijing 100083, Peoples R China. E-mail Address: nanjian@red.semi.ac.cn
Adobe PDF(9352Kb)  |  收藏  |  浏览/下载：2042/355  |  提交时间：2010/04/13
Vision Chip  Safety Driving Assist  Lane Detection  Dual-core  Processing Element Array